On Sun, Jul 09, 2017 at 10:25:23PM +1000, Jonathan Liu wrote:
> Hi Priit,
>
> On 5 July 2017 at 06:04, Priit Laes <plaes@xxxxxxxxx> wrote:
> > Introduce a clock controller driver for sun4i A10 and sun7i A20
> > series SoCs.
> >
> > Signed-off-by: Priit Laes <plaes@xxxxxxxxx>
> > ---
> > drivers/clk/sunxi-ng/Kconfig | 14 +-
> > drivers/clk/sunxi-ng/Makefile | 1 +-
> > drivers/clk/sunxi-ng/ccu-sun4i-a10.c | 1448 ++++++++++++++++++++++-
> > drivers/clk/sunxi-ng/ccu-sun4i-a10.h | 61 +-
> > include/dt-bindings/clock/sun4i-a10-ccu.h | 200 +++-
> > include/dt-bindings/clock/sun7i-a20-ccu.h | 53 +-
> > include/dt-bindings/reset/sun4i-a10-ccu.h | 67 +-
> > 7 files changed, 1844 insertions(+)
> > create mode 100644 drivers/clk/sunxi-ng/ccu-sun4i-a10.c
> > create mode 100644 drivers/clk/sunxi-ng/ccu-sun4i-a10.h
> > create mode 100644 include/dt-bindings/clock/sun4i-a10-ccu.h
> > create mode 100644 include/dt-bindings/clock/sun7i-a20-ccu.h
> > create mode 100644 include/dt-bindings/reset/sun4i-a10-ccu.h
> >
> [snip]
> > diff --git a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
> > new file mode 100644
> > index 0000000..49052b7
> > --- /dev/null
> > +++ b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
> [snip]
>
> > +static const char *const hdmi_parents[] = { "pll-video0", "pll-video0-2x",
> > + "pll-video1", "pll-video1-2x" };
> > +static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", hdmi_parents,
> > + 0x150, 0, 4, 24, 2, BIT(31), 0);
>
> hdmi_parents is in the wrong order. The correct order is "pll-video0",
> "pll-video1", "pll-video0-2x", "pll-video1-2x".
Ugh.. I'm really sorry.
Päikest,
Priit
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