On Sun, Jul 09, 2017 at 08:40:05PM +0300, Vladimir Barinov wrote: > From: Vladimir Barinov <vladimir.barinov+renesas@xxxxxxxxxxxxxxxxxx> > > IDT VersaClock 5 5P49V5925 has 5 clock outputs, 4 fractional dividers. > Input clock source can be taken only from external reference clock. > > Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@xxxxxxxxxxxxxxxxxx> > --- > Changes in version 2: > - fixed typo in patch header: VC5 has 5 clock outputs > - rebased against patch: > [V3,7/8] clk: vc5: Add bindings for IDT VersaClock 5P49V6901 > > Documentation/devicetree/bindings/clock/idt,versaclock5.txt | 4 ++++ > 1 file changed, 4 insertions(+) Acked-by: Rob Herring <robh@xxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
