On Fri, Jun 23, 2017 at 03:00:49PM +0200, Pierre-Yves MORDRET wrote:
> This patch adds the documentation of device tree bindings for the STM32
> DMAMUX.
>
> Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@xxxxxxxxx>
> Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@xxxxxx>
> ---
> Version history:
> v2:
> * Move clock bindings from optional to mandatory one
> * Drop channelID bindings as managed dynamically from now on by
> DMAMUX driver.
> ---
> ---
> .../devicetree/bindings/dma/stm32-dmamux.txt | 57 ++++++++++++++++++++++
> 1 file changed, 57 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/stm32-dmamux.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/stm32-dmamux.txt b/Documentation/devicetree/bindings/dma/stm32-dmamux.txt
> new file mode 100644
> index 0000000..1d413c5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/stm32-dmamux.txt
> @@ -0,0 +1,57 @@
> +STM32 DMA MUX (DMA request router)
> +
> +Required properties:
> +- compatible: "st,stm32-dmamux"
This should be SoC specific (or at least have f4, h7, etc.).
> +- reg: Memory map for accessing module
> +- #dma-cells: Should be set to <3>.
> + For more details about the three cells, please see
> + stm32-dma.txt documentation binding file
The example below has 4 cells for the dma ctrlr?
> +- dma-masters: Phandle pointing to the DMA controller
> +
> +Optional properties:
> +- dma-channels : Number of DMA channels supported.
> +- dma-requests : Number of DMA requests supported.
> +- resets: Reference to a reset controller asserting the DMA controller
> +- clocks: Input clock of the DMAMUX instance.
> +
> +Example:
> +
> +/* DMA controller */
> +dma2: dma-controller@40026400 {
> + compatible = "st,stm32-dma";
> + reg = <0x40026400 0x400>;
> + interrupts = <56>,
> + <57>,
> + <58>,
> + <59>,
> + <60>,
> + <68>,
> + <69>,
> + <70>;
> + clocks = <&clk_hclk>;
> + #dma-cells = <4>;
> + st,mem2mem;
> + resets = <&rcc 150>;
> + st,dmamux;
> + dma-channels = <8>;
> +};
> +
> +/* DMA mux */
> +dmamux2: dma-router@40020820 {
> + compatible = "st,stm32-dmamux";
> + reg = <0x40020800 0x1c>;
> + #dma-cells = <3>;
> + dma-requests = <128>;
> + dma-masters = <&dma2>;
> +};
> +
> +/* DMA client */
> +usart1: serial@40011000 {
> + compatible = "st,stm32-usart", "st,stm32-uart";
> + reg = <0x40011000 0x400>;
> + interrupts = <37>;
> + clocks = <&clk_pclk2>;
> + dmas = <&dmamux2 41 0x414 0>,
> + <&dmamux2 42 0x414 0>;
> + dma-names = "rx", "tx";
> +};
> --
> 1.9.1
>
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