As long as the clk driver is not building, use a fixed-clock for the UART.
Signed-off-by: Andreas Färber <afaerber@xxxxxxx>
---
arch/arm/boot/dts/mb86s71-f-cue.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/mb86s71-f-cue.dts b/arch/arm/boot/dts/mb86s71-f-cue.dts
index 148d1aee11a6..726bf189e8e7 100644
--- a/arch/arm/boot/dts/mb86s71-f-cue.dts
+++ b/arch/arm/boot/dts/mb86s71-f-cue.dts
@@ -27,6 +27,12 @@
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
+
+ uart0_clk: uart0-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <7813000>;
+ #clock-cells = <0>;
+ };
};
&arch_timer {
@@ -35,4 +41,6 @@
&uart0 {
status = "okay";
+ clocks = <&uart0_clk>;
+ clock-names = "apb_pclk";
};
--
2.12.3
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