On Mon, Jun 05, 2017 at 10:31:32AM -0700, Paul Burton wrote:
> Introduce documentation for a device tree binding for the Intel Platform
> Controller Hub (PCH) GigaBit Ethernet (GBE) device. Although this is a
> PCIe device & thus largely auto-detectable, this binding will be used to
> provide the driver with the PHY reset GPIO.
>
> Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
> Cc: David S. Miller <davem@xxxxxxxxxxxxx>
> Cc: Eric Dumazet <edumazet@xxxxxxxxxx>
> Cc: Jarod Wilson <jarod@xxxxxxxxxx>
> Cc: Mark Rutland <mark.rutland@xxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: Tobias Klauser <tklauser@xxxxxxxxxx>
> Cc: devicetree@xxxxxxxxxxxxxxx
> Cc: linux-mips@xxxxxxxxxxxxxx
> Cc: netdev@xxxxxxxxxxxxxxx
>
> ---
>
> Changes in v4: None
>
> Changes in v3:
> - New patch.
>
> Changes in v2: None
>
> Documentation/devicetree/bindings/net/pch_gbe.txt | 25 +++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/pch_gbe.txt
>
> diff --git a/Documentation/devicetree/bindings/net/pch_gbe.txt b/Documentation/devicetree/bindings/net/pch_gbe.txt
> new file mode 100644
> index 000000000000..5de479c26b04
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/pch_gbe.txt
> @@ -0,0 +1,25 @@
> +Intel Platform Controller Hub (PCH) GigaBit Ethernet (GBE)
> +
> +Required properties:
> +- compatible: Should be the PCI vendor & device ID, eg. "pci8086,8802".
> +- reg: Should be a PCI device number as specified by the PCI bus
> + binding to IEEE Std 1275-1994.
> +- phy-reset-gpios: Should be a GPIO list containing a single GPIO that
> + resets the attached PHY when active.
> +
> +Example:
> +
> + eg20t_mac@2,0,1 {
ethernet@...
Your unit address is not valid for PCI[1]. You should not have the bus
number (2) as there should be a bridge node that defines the bus number.
Rob
[1] http://www.o3one.org/hwdocs/openfirmware/pci_supplement_2_1.pdf
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