On Fri, Jun 02, 2017 at 06:52:38PM -0500, thor.thayer@xxxxxxxxxxxxxxx wrote: > From: Thor Thayer <thor.thayer@xxxxxxxxxxxxxxx> > > Add the documentation to support the Altera synthesizable > logic I2C Controller in FPGA. > > Signed-off-by: Thor Thayer <thor.thayer@xxxxxxxxxxxxxxx> > --- > v2 Change the subject to identify dt-bindings > Add synthesizable logic to description. > Change compatible string to "altr,softip-i2c" > Make description of clock phandle singular since 1 clock. > Remove altr, from fifo-size > Specify fifo-size is in bytes. > v3 Add version to compatible string "altr,softip-i2c-v1.0" > Add for use in FPGA in description. > --- > .../devicetree/bindings/i2c/i2c-altera.txt | 39 ++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > create mode 100644 Documentation/devicetree/bindings/i2c/i2c-altera.txt Acked-by: Rob Herring <robh@xxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
