On Fri, Jun 2, 2017 at 5:02 AM, Benjamin Herrenschmidt
<benh@xxxxxxxxxxxxxxxxxxx> wrote:
> On Fri, 2017-06-02 at 01:46 -0700, Brendan Higgins wrote:
>> Added initial master support for Aspeed I2C controller. Supports
>> fourteen busses present in AST24XX and AST25XX BMC SoCs by Aspeed.
>>
>> Signed-off-by: Brendan Higgins <brendanhiggins@xxxxxxxxxx>
>
> Reviewed-by: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
> ---
>
> Just spotted a completely minor/tivial nit:
>
>> +static int aspeed_i2c_master_xfer(struct i2c_adapter *adap,
>> + struct i2c_msg *msgs, int num)
>> +{
>> + struct aspeed_i2c_bus *bus = adap->algo_data;
>> + unsigned long time_left, flags;
>> + int ret = 0;
>> +
>> + spin_lock_irqsave(&bus->lock, flags);
>> + bus->cmd_err = 0;
> ^^^^^^^^^^^^^^^^^
>
> This is probably unnecessary now since it's initialized further down.
Nope, reset uses cmd_err as well. Maybe reset should initialize it? Not sure.
>
>> + /* If bus is busy, attempt recovery. We assume a single master
>> + * environment.
>> + */
>> + if (readl(bus->base + ASPEED_I2C_CMD_REG) & ASPEED_I2CD_BUS_BUSY_STS) {
>> + spin_unlock_irqrestore(&bus->lock, flags);
>> + ret = aspeed_i2c_recover_bus(bus);
>> + if (ret)
>> + return ret;
>> + spin_lock_irqsave(&bus->lock, flags);
>> + }
>> +
>> + bus->cmd_err = 0;
>> + bus->msgs = msgs;
>> + bus->msgs_index = 0;
>> + bus->msgs_count = num;
>
> Now I'd like Andrew to give it a spin as he's currently
> testing/debugging some i2c related stuff to be 100% certain it works
> fine on our systems.
If you haven't done this yet, you should try version 10 instead.
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