From: Pramod Kumar <pramod.kumar@xxxxxxxxxxxx> The GPIOs on Stingray SOC are based on iProc GPIOs hence using this we add GPIO DT nodes for Stingray SOC. Signed-off-by: Pramod Kumar <pramodku@xxxxxxxxxxxx> Reviewed-by: Ray Jui <rjui@xxxxxxxxxxxx> Reviewed-by: Scott Branden <sbranden@xxxxxxxxxxxx> --- .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index 639c25d..e91debe 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -251,6 +251,14 @@ ranges = <0x0 0x0 0x66400000 0x100000>; #include "stingray-clock.dtsi" + + gpio_crmu: gpio@00024800 { + compatible = "brcm,iproc-gpio"; + reg = <0x00024800 0x4c>; + ngpios = <6>; + #gpio-cells = <2>; + gpio-controller; + }; }; hsls { @@ -261,6 +269,32 @@ #include "stingray-pinctrl.dtsi" + gpio_hsls: gpio@000d0000 { + compatible = "brcm,iproc-gpio"; + reg = <0x000d0000 0x864>; + ngpios = <151>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; + gpio-ranges = <&pinmux 0 0 16>, + <&pinmux 16 71 2>, + <&pinmux 18 131 8>, + <&pinmux 26 83 6>, + <&pinmux 32 123 4>, + <&pinmux 36 43 24>, + <&pinmux 60 89 2>, + <&pinmux 62 73 4>, + <&pinmux 66 95 28>, + <&pinmux 94 127 4>, + <&pinmux 98 139 10>, + <&pinmux 108 16 27>, + <&pinmux 135 77 6>, + <&pinmux 141 67 4>, + <&pinmux 145 149 6>, + <&pinmux 151 91 4>; + }; + uart0: uart@00100000 { device_type = "serial"; compatible = "snps,dw-apb-uart"; -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html