Allwinner V3s have two PWM channels, the first channel can be only at PB4 pin, and the second channel PB5. Add their pinmux configurations. Signed-off-by: Icenowy Zheng <icenowy@xxxxxxx> --- arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index bb080c4bd22c..db3328a2c89a 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -239,6 +239,16 @@ pins = "PC0", "PC1", "PC2", "PC3"; function = "spi0"; }; + + pwm0_pins: pwm0 { + pins = "PB4"; + function = "pwm0"; + }; + + pwm1_pins: pwm1 { + pins = "PB5"; + function = "pwm1"; + }; }; timer@01c20c00 { -- 2.12.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html