Re: [PATCH 2/2] clk: vc5: Add support for IDT VersaClock 5P49V5935

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On 04.04.2017 16:23, Geert Uytterhoeven wrote:
On Tue, Apr 4, 2017 at 3:21 PM, Marek Vasut <marek.vasut@xxxxxxxxx> wrote:
On 04/04/2017 03:16 PM, Alexey Firago wrote:
+     switch (vc5->model) {
+     case IDT_VC5_5P49V5923:
+     case IDT_VC5_5P49V5933:
+             vc5->clk_fod_cnt = 2;
+             vc5->clk_out_cnt = 3;
+             break;
+     case IDT_VC5_5P49V5935:
+             vc5->clk_fod_cnt = 4;
+             vc5->clk_out_cnt = 5;
+             break;
+     default:
+             /* Should never go here */
+             dev_err(&client->dev, "unsupported IDT VC5 ID specified\n");
+             return -EINVAL;
+     }
+
      vc5->pin_xin = devm_clk_get(&client->dev, "xin");
      if (PTR_ERR(vc5->pin_xin) == -EPROBE_DEFER)
              return -EPROBE_DEFER;

@@ -744,7 +772,7 @@ static int vc5_probe(struct i2c_client *client,
      return 0;

 err_clk:
-     if (vc5->model == IDT_VC5_5P49V5933)
+     if (vc5->model == IDT_VC5_5P49V5933 || vc5->model == IDT_VC5_5P49V5935)

Maybe we should introduce some sort of flags to describe the VC
properties instead of using the model all over the place ?

Yep, a structure describing the features (incl. fod_cnt and out_cnt), to be
pointed to by clk_vc5_of_match[].data.

Ok, will rework and resend.

Thanks,
Alexey
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