On 28/03/17 10:12, Benjamin Herrenschmidt wrote: > On Tue, 2017-03-28 at 09:32 +0100, Marc Zyngier wrote: >> I'm a bit concerned by this. It means that you can't even mask an >> interrupt. Is that really what you intend to do? Or all that the HW can >> do? If you cannot mask an interrupt, you're at the mercy of a screaming >> device... > > This is not really an interrupt controller. It's a "summary" register > that reflects the state of the 14 i2c controller interrupts. > > This approach does have the advantage of providing separate counters in > /proc/interrupts which is rather nice, but it does have overhead. On > those shittly little ARMv9 400Mhz cores it can be significant. <pedantic> s/ARMv9/ARM9/, as we're still on variations of the ARMv8 architecture ;-) </pedantic> A 400MHz ARM9 (which is either ARMv4 or ARMv5) is not too bad (hey, we still have a couple of Versatile-ABs here...). Caches are pretty small though. > I would personally have some kind of trick to register a single > interrupt handler that calls directly the handlers of the respective > i2c busses via a simple indirection for speed, maybe adding my custom > sysfs or debugfs statistics. But that's just me trying to suck the last > cycle out of the bloody thing ;-) I'd hope the irqdomain itself to be pretty light (the revmap should help here), but of course you're going to do more work. Counters also come at a cost. It'd be interesting to see if Brendan has any overhead data about this. Cheers, M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
