On 03/24/2017 08:03 AM, Mark Rutland wrote:
On Fri, Mar 24, 2017 at 07:46:23AM -0700, Doug Berger wrote:
This patch set contains changes to enable the GISB arbiter driver
on the latest ARM64 architecture Set-Top Box chips from Broadcom.
This driver relies on being able to hook the abort handlers of
the processor core that are triggered by bus error signals
generated by the GISB bus arbiter hardware found in BCM7XXX chips.
Ugh; hardware generating asynchonous exceptions is hideous. I had hoped
that such hardware was a thing of the past.
Yes, hope springs eternal :)
Under what circumstances does the GISB bus arbiter generate these
aborts?
Since the GISB bus generally uses buffered writes it can early ack the
CPU bus master before the arbitration error is detected. This causes
the bus error to be seen as an asynchronous abort by the CPU.
Mark.
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