On Mon, Mar 13, 2017 at 07:52:51PM +0530, Kishon Vijay Abraham I wrote: > Update device tree binding documentation of TI's dra7xx PCI > controller to include property for enabling unaligned mem access. > > Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx> > --- > Documentation/devicetree/bindings/pci/ti-pci.txt | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt > index 190828a5f32a..b69dd7dbd29e 100644 > --- a/Documentation/devicetree/bindings/pci/ti-pci.txt > +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt > @@ -39,6 +39,11 @@ DEVICE MODE > - interrupts : one interrupt entries must be specified for main interrupt. > - num-ib-windows : number of inbound address translation windows > - num-ob-windows : number of outbound address translation windows > + - ti,syscon-unaligned-access: phandle to the syscon dt node. The 1st argument > + should contain the register offset within syscon > + and the 2nd argument should contain the bit field > + for setting the bit to enable unaligned > + access. This should be setup by the firmware/bootloader or some platform code. Why does the PCI host need to configure this? Rob -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
