On Thu, 9 Mar 2017, Gregory CLEMENT wrote:
> From: Hua Jing <jinghua@xxxxxxxxxxx>
>
> - Add a new compatible string for the Armada 3700 SoCs
>
> - add sbuscfg support for orion usb controller driver. For the SoCs
> without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg
> register to guarantee the AHB master's burst would not overrun or
> underrun the FIFO.
>
> - the sbuscfg register has to be set after the usb controller reset,
> otherwise the value would be overridden to 0. In order to do this, the
> reset callback is registered.
>
> [gregory.clement@xxxxxxxxxxxxxxxxxx: - reword commit and comments
> - fix error path in ehci_orion_drv_reset()
> - fix checkpatch warning]
> Signed-off-by: Hua Jing <jinghua@xxxxxxxxxxx>
> Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxxxxxxxxx>
> Reviewed-by: Andrew Lunn <andrew@xxxxxxx>
Acked-by: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
> ---
> .../devicetree/bindings/usb/ehci-orion.txt | 4 ++-
> drivers/usb/host/ehci-orion.c | 36 ++++++++++++++++++++++
> 2 files changed, 39 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt
> index 17c3bc858b86..2855bae79fda 100644
> --- a/Documentation/devicetree/bindings/usb/ehci-orion.txt
> +++ b/Documentation/devicetree/bindings/usb/ehci-orion.txt
> @@ -1,7 +1,9 @@
> * EHCI controller, Orion Marvell variants
>
> Required properties:
> -- compatible: must be "marvell,orion-ehci"
> +- compatible: must be one of the following
> + "marvell,orion-ehci"
> + "marvell,armada-3700-ehci"
> - reg: physical base address of the controller and length of memory mapped
> region.
> - interrupts: The EHCI interrupt
> diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
> index ee8d5faa0194..1aec87ec68df 100644
> --- a/drivers/usb/host/ehci-orion.c
> +++ b/drivers/usb/host/ehci-orion.c
> @@ -47,6 +47,18 @@
> #define USB_PHY_IVREF_CTRL 0x440
> #define USB_PHY_TST_GRP_CTRL 0x450
>
> +#define USB_SBUSCFG 0x90
> +
> +/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
> +#define USB_SBUSCFG_BAWR_ALIGN_128B (0x3 << 6)
> +#define USB_SBUSCFG_BARD_ALIGN_128B (0x3 << 3)
> +/* AHBBRST = 3 : Align AHB Burst to INCR16 (64 bytes) */
> +#define USB_SBUSCFG_AHBBRST_INCR16 (0x3 << 0)
> +
> +#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B \
> + | USB_SBUSCFG_BARD_ALIGN_128B \
> + | USB_SBUSCFG_AHBBRST_INCR16)
> +
> #define DRIVER_DESC "EHCI orion driver"
>
> #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
> @@ -151,8 +163,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
> }
> }
>
> +static int ehci_orion_drv_reset(struct usb_hcd *hcd)
> +{
> + struct device *dev = hcd->self.controller;
> + int ret;
> +
> + ret = ehci_setup(hcd);
> + if (ret)
> + return ret;
> +
> + /*
> + * For SoC without hlock, need to program sbuscfg value to guarantee
> + * AHB master's burst would not overrun or underrun FIFO.
> + *
> + * sbuscfg reg has to be set after usb controller reset, otherwise
> + * the value would be override to 0.
> + */
> + if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
> + wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
> +
> + return ret;
> +}
> +
> static const struct ehci_driver_overrides orion_overrides __initconst = {
> .extra_priv_size = sizeof(struct orion_ehci_hcd),
> + .reset = ehci_orion_drv_reset,
> };
>
> static int ehci_orion_drv_probe(struct platform_device *pdev)
> @@ -310,6 +345,7 @@ static int ehci_orion_drv_remove(struct platform_device *pdev)
>
> static const struct of_device_id ehci_orion_dt_ids[] = {
> { .compatible = "marvell,orion-ehci", },
> + { .compatible = "marvell,armada-3700-ehci", },
> {},
> };
> MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
