On Fri, Feb 24, 2017 at 02:36:34PM +0530, Viresh Kumar wrote:
> If the consumers don't need the capability of switching to different
> domain performance states at runtime, then they can simply define their
> required domain performance state in their nodes directly.
>
> But if the device needs the capability of switching to different domain
> performance states, as they may need to support different clock rates,
> then the per OPP node can be used to contain that information.
>
> This patch introduces the domain-performance-state (already defined by
> Power Domain bindings) to the per OPP node.
>
We already have OPP voltages, why are those not sufficient?
> Signed-off-by: Viresh Kumar <viresh.kumar@xxxxxxxxxx>
> Tested-by: Rajendra Nayak <rnayak@xxxxxxxxxxxxxx>
> ---
> Documentation/devicetree/bindings/opp/opp.txt | 64 +++++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/opp/opp.txt b/Documentation/devicetree/bindings/opp/opp.txt
> index 9f5ca4457b5f..7f6bb52521b6 100644
> --- a/Documentation/devicetree/bindings/opp/opp.txt
> +++ b/Documentation/devicetree/bindings/opp/opp.txt
> @@ -154,6 +154,15 @@ properties.
>
> - status: Marks the node enabled/disabled.
>
> +- domain-performance-state: A positive integer value representing the minimum
> + performance level (of the parent domain) required by the consumer as defined
> + by ../power/power_domain.txt binding document. The OPP nodes can contain the
> + "domain-performance-state" property, only if the device node contains a
> + "power-domains" property. The OPP nodes aren't allowed to contain the
> + "domain-performance-state" property partially, i.e. Either all OPP nodes in
> + the OPP table have the "domain-performance-state" property or none of them
> + have it.
> +
> Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together.
>
> / {
> @@ -528,3 +537,58 @@ Example 5: opp-supported-hw
> };
> };
> };
> +
> +Example 7: domain-Performance-state:
> +(example: For 1GHz require domain state 1 and for 1.1 & 1.2 GHz require state 2)
> +
> +/ {
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp@1000000000 {
> + opp-hz = /bits/ 64 <1000000000>;
> + domain-performance-state = <1>;
Thinking about this some more, there's a problem here that you have no
link to foo_domain. I guess that resides in the cpu's node?
Perhaps instead of a number, this should be a phandle to pstate@1. Then
you just get the parent if you need to know the domain.
> + };
> + opp@1100000000 {
> + opp-hz = /bits/ 64 <1100000000>;
> + domain-performance-state = <2>;
> + };
> + opp@1200000000 {
> + opp-hz = /bits/ 64 <1200000000>;
> + domain-performance-state = <2>;
> + };
> + };
> +
> + foo_domain: power-controller@12340000 {
> + compatible = "foo,power-controller";
> + reg = <0x12340000 0x1000>;
> + #power-domain-cells = <0>;
> +
> + performance-states {
> + compatible = "domain-performance-state";
> + pstate@1 {
> + reg = <1>;
> + domain-microvolt = <970000 975000 985000>;
> + };
> + pstate@2 {
> + reg = <2>;
> + domain-microvolt = <1000000 1075000 1085000>;
> + };
> + };
> + }
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + compatible = "arm,cortex-a9";
> + reg = <0>;
> + clocks = <&clk_controller 0>;
> + clock-names = "cpu";
> + operating-points-v2 = <&cpu0_opp_table>;
> + power-domains = <&foo_domain>;
> + };
> + };
> +};
> --
> 2.7.1.410.g6faf27b
>
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