Hi Anatolij, On Thu, Feb 16, 2017 at 7:10 AM, Anatolij Gustschin <agust@xxxxxxx> wrote: > Add dt binding documentation details for Xilinx FPGA configuration > over slave serial interface. > > Signed-off-by: Anatolij Gustschin <agust@xxxxxxx> > --- > .../bindings/fpga/xilinx-slave-serial.txt | 24 ++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt > > diff --git a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt > new file mode 100644 > index 0000000..b5fa6a6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt > @@ -0,0 +1,24 @@ > +Xilinx Slave Serial SPI FPGA Manager > + > +Xilinx Spartan-6 FPGAs support a method of loading the bitstream over > +what is referred to as "slave serial" interface. > +The slave serial link is not technically SPI, and might require extra > +circuits in order to play nicely with other SPI slaves on the same bus. > + > +See https://www.xilinx.com/support/documentation/user_guides/ug380.pdf > + > +Required properties: > +- compatible: should contain "xlnx,fpga-slave-serial" > +- reg: spi chip select of the FPGA > +- prog_b-gpios: config pin (referred to as PROGRAM_B in the manual) > +- done-gpios: config status pin (referred to as DONE in the manual) > + > +Example: > + fpga_mgr_spi: fpga-spi@0 { Maybe we can standardize them here to be fpga-mgr@X, that being said, I don't do what I suggested in the zynq fpga mgr bindings docs. > + compatible = "xlnx,fpga-slave-serial"; > + spi-max-frequency = <60000000>; > + spi-cpha; > + reg = <0>; > + done-gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; > + prog_b-gpio = <&gpio0 29 GPIO_ACTIVE_LOW>; > + }; > -- > 1.9.1 > Thanks, Moritz -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
