Exynos5433 LPASS module requires some clocks for proper operation with
power domain.
Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 57c7bbeb65a7..16072c1c3ed3 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1494,6 +1494,8 @@
audio-subsystem@11400000 {
compatible = "samsung,exynos5433-lpass";
reg = <0x11400000 0x100>, <0x11500000 0x08>;
+ clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
+ clock-names = "sfr0_ctrl";
samsung,pmu-syscon = <&pmu_system_controller>;
#address-cells = <1>;
#size-cells = <1>;
--
1.9.1
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