On Thu, Jan 12, 2017 at 02:03:23AM +0100, Marek Vasut wrote: > Add bindings for IDT VersaClock 5 5P49V5923 and 5P49V5933 chips. > These are I2C clock generators with optional clock source from > either XTal or dedicated clock generator and, depending on the > model, two or more clock outputs. > > Signed-off-by: Marek Vasut <marek.vasut@xxxxxxxxx> > Cc: Michael Turquette <mturquette@xxxxxxxxxxxx> > Cc: Stephen Boyd <sboyd@xxxxxxxxxxxxxx> > Cc: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx> > Cc: Rob Herring <robh@xxxxxxxxxx> > Cc: devicetree@xxxxxxxxxxxxxxx > Cc: linux-renesas-soc@xxxxxxxxxxxxxxx > --- > V2: Add mapping between the clock specifier and physical pins of the chip > --- > .../devicetree/bindings/clock/idt,versaclock5.txt | 65 ++++++++++++++++++++++ > 1 file changed, 65 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/idt,versaclock5.txt Acked-by: Rob Herring <robh@xxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
