On 9 January 2017 at 05:53, Matt Ranostay <matt@ranostay.consulting> wrote: > On Fri, Dec 30, 2016 at 12:05 AM, Linus Walleij > <linus.walleij@xxxxxxxxxx> wrote: >> On Mon, Dec 19, 2016 at 1:01 AM, Matt Ranostay <matt@ranostay.consulting> wrote: >> >>> * SD8787 has a "powerdown" line, and CW1200 has a "powerup" line.. I >>> know this is a simple logic inversion. >> >> If this is a GPIO line, the GPIO subsystem can flag a line for >> inverted logic. GPIO_ACTIVE_LOW from device tree for example. > > Slight ping on Ulf on this thread :). Thanks, sorry for the delay! > > I do understand the inverted logic flag but that doesn't help if there > are different logic states between various chipsets. For cw1200 (I looked at code from an old ST-Ericsson vendor tree), the sequence is as follows: 1) Enable clock/power to the card/chip. 2) Assert GPIO pin. I assume this also can be done before the clock/power is enabled. 3) Wait some time (~50ms). 4) De-assert GPIO pin. 5) Wait some time (~20ms) 6) Assert GPIO pin. 7) Wait some time (~32ms). At power off, the GPIO pin is de-asserted and of course also the clock/power is disabled. Just to make sure we have all the relevant logic. Looking at mmc pwrseq simple, perhaps we can extend this to deal with GPIOs that needs to be *toggled*, as this is not just reset GPIOs. Then we also need to deal with the delays in-between the toggling. Thoughts? Kind regards Uffe -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
