RE: clk: clk-mstp has never worked for RZ/A1

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Hi Geert,

On 12/14/206, Geert Uytterhoeven wrote:
> Oops... Where did your (offlist) bug report for rspi needing a delay after
> clock enable come from?

Because the RSPI driver in our current BSP is almost exactly the same so I was making the assumption that it would be a problem (but I have not tested it yet).


> I was aware the registers are documented to be 8-bit wide, but I always
> assumed 32-bit accesses do work.

At first, I did too.


> Another option is to let the driver bind against "renesas,r7s72100-mstp-
> clocks", and switch to 8-bit access mode.
> 
> CLK_OF_DECLARE(cpg_mstp_clks, "renesas,r7s72100-mstp-clocks",
> cpg_mstp_clocks_init8);
> 
> cpg_mstp_clocks_init8() can set a gloal flag, and call
> cpg_mstp_clocks_init().
> 
> The latter means no DT update is needed, and thus preserves compatibility
> with old DTBs.

I like this idea. I'll code it up and give it a shot.

Thank you.

Chris
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