On Tue, Dec 6, 2016 at 3:53 AM, Andrew Jeffery <andrew@xxxxxxxx> wrote: > The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends > on bits in both the System Control Unit and the LPC Host Controller. > > The Aspeed LPC Host Controller is described as a child node of the > LPC host-range syscon device for arbitration of access by the host > controller and pinmux drivers. > > Signed-off-by: Andrew Jeffery <andrew@xxxxxxxx> Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx> Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
