Hi Shawn On 2016-11-23 15:02, Fabio Estevam wrote: > On Tue, Nov 22, 2016 at 10:42 PM, Stefan Agner <stefan@xxxxxxxx> wrote: >> The eLCDIF IP of the i.MX 7 SoC knows multiple clocks and lists them >> separately: >> >> Clock Clock Root Description >> apb_clk MAIN_AXI_CLK_ROOT AXI clock >> pix_clk LCDIF_PIXEL_CLK_ROOT Pixel clock >> ipg_clk_s MAIN_AXI_CLK_ROOT Peripheral access clock >> >> All of them are switched by a single gate, which is part of the >> IMX7D_LCDIF_PIXEL_ROOT_CLK clock. Hence using that clock also for >> the AXI bus clock (clock-name "axi") makes sure the gate gets >> enabled when accessing registers. >> >> There seem to be no separate AXI display clock, and the clock is >> optional. Hence remove the dummy clock. >> >> This fixes kernel freezes when starting the X-Server (which >> disables/re-enables the display controller). >> >> Signed-off-by: Stefan Agner <stefan@xxxxxxxx> > > Reviewed-by: Fabio Estevam <fabio.estevam@xxxxxxx> Since this fixes a kernel freeze, is there a chance to get this still in 4.9? -- Stefan -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
