Hi Kishon,
On Thu, Nov 10, 2016 at 2:33 PM, Vivek Gautam
<vivek.gautam@xxxxxxxxxxxxxx> wrote:
> Hi Kishon,
>
>>> +unsigned int msm8996_pciephy_tx_offsets[] = { 0x1000, 0x2000, 0x3000 };
>>> +unsigned int msm8996_pciephy_rx_offsets[] = { 0x1200, 0x2200, 0x3200 };
>>> +unsigned int msm8996_pciephy_pcs_offsets[] = { 0x1400, 0x2400, 0x3400 };
>> you can have a separate reg map for each lane and all these can come from dt.
>
> The idea is to avoid the any child nodes for lanes. So, we have the complete
> ioremaped region and these offsets to tx, rx and pcs blocks.
I don't see benefits in using regmap for different lanes.
Do you see benefits in replacing a bunch of readl()/writel() with
regmap_read()/regmap_update_bits()/regmap_write() ?
I can as well use separate 'reg' values for each lanes, and have the offsets
come from dt. Something like below :
- reg: array of offset and length of the PHY register sets.
at index 0: offset and length of register set for PHY common
serdes block.
from index 1 - N: offset and length of register set for each lane,
for N number of phy lanes (ports).
- lane-offsets: array of offsets to tx, rx and pcs blocks for phy lanes.
Example:
pcie_phy: pciephy@34000 {
compatible = "qcom,msm8996-qmp-pcie-phy";
reg = <0x034000 0x48f>,
<0x035000 5bf>,
<0x036000 5bf>,
<0x037000 5bf>;
/* tx, rx, pcs */
lane-offsets = <0x0 0x200 0x400>;
Does this look OK ? Or should i use regmap only ?
Thanks
Vivek
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