Hi,
The Allwinner pin controllers can setup a different debouncing period based
on two clocks and a prescaler.
This debouncing is applied to the whole IRQ bank, which prevents us from
using the per-pin property that is usually used.
Let me know what you think,
Maxime
Changes from v2:
- Deal with a debounce set to 0
- Change debounce divider function name
- Used DIV_ROUND_CLOSEST instead of manual division
- Convert the R_PIO too
- Added the Acked-by
Changes from v1:
- Changed the resolution of the debouncing property to microseconds, and
switched to the input-debounce instead of a custom one.
Maxime Ripard (2):
pinctrl: sunxi: Add support for interrupt debouncing
ARM: sunxi: Add the missing clocks to the pinctrl nodes
Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 14 ++++++++++++-
arch/arm/boot/dts/sun4i-a10.dtsi | 3 ++-
arch/arm/boot/dts/sun5i.dtsi | 3 ++-
arch/arm/boot/dts/sun6i-a31.dtsi | 6 +++--
arch/arm/boot/dts/sun7i-a20.dtsi | 3 ++-
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 6 +++--
arch/arm/boot/dts/sun8i-h3.dtsi | 6 +++--
arch/arm/boot/dts/sun9i-a80.dtsi | 6 +++--
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 84 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 7 ++++++-
10 files changed, 127 insertions(+), 11 deletions(-)
base-commit: bc5952be2d424b75ed11ff599b70bc9604e98d42
--
git-series 0.8.11
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