On Thu, Nov 03, 2016 at 03:55:46PM +0800, Chen-Yu Tsai wrote: > According to the DMA engine API documentation, maxburst denotes the > largest possible size of a single transfer, so as not to overflow > destination FIFOs as explained in this excerpt from dmaengine.h > > * @src_maxburst: the maximum number of words (note: words, as in > * units of the src_addr_width member, not bytes) that can be sent > * in one burst to the device. Typically something like half the > * FIFO depth on I/O peripherals so you don't overflow it. This > * may or may not be applicable on memory sources. > * @dst_maxburst: same as src_maxburst but for destination target > * mutatis mutandis. > > The TX FIFO is 64 samples deep for stereo, and the RX FIFO is 16 > samples deep. So maxburst could be 32 and 8 for TX and RX respectively. > > Unfortunately the sunxi DMA controller driver takes maxburst as > the requested burst size, rather than a limit, and returns an error > for unsupported values. The original value was 4, but some later > SoCs do not officially support this burst size. > > This patch increases maxburst on the TX side to 8, which is supported > by all variants of the sunxi DMA controller. > > Cc: Vinod Koul <vinod.koul@xxxxxxxxx> > Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx> Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx> Thanks, Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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