On Wed, Oct 26, 2016 at 2:08 PM, Brian Norris <briannorris@xxxxxxxxxxxx> wrote: > On Wed, Oct 26, 2016 at 02:06:48PM -0700, Dmitry Torokhov wrote: >> On Wed, Oct 26, 2016 at 01:56:34PM -0700, Brian Norris wrote: >> > On Wed, Oct 26, 2016 at 01:51:48PM -0700, Rajat Jain wrote: >> > > On Wed, Oct 26, 2016 at 1:46 PM, Dmitry Torokhov >> > > <dmitry.torokhov@xxxxxxxxx> wrote: >> > > On Wed, Oct 26, 2016 at 01:17:36PM -0700, Brian Norris wrote: >> > > Sorry, I just saw this... Why do we need devicetree data for >> > > discoverable bus (PCI)? How does the driver work on systems that do not >> > > use DT? Why do we need them to behave differently? >> > > >> > > There are a couple of out-of-band GPIO pins from Marvell chip that can >> > > serve as wake-up pins (wake up the CPU when asserted). The Marvell chip >> > > has to be told which GPIO pin is to be used as the wake-up pin. The pin to >> > > be used is system / platform dependent. (On some systems it could be >> > > GPIO13, on others it could be GPIO14 etc depending on how the marvell chip >> > > is wired up to the CPU). >> >> So wakeup pin is not wired to PCIe WAKE? > > Not in our case. > >> > There's also calibration data. See "marvell,caldata*" and >> > "marvell,wakeup-pin" properties. Currently only for SDIO, in >> > Documentation/devicetree/bindings/net/wireless/marvell-sd8xxx.txt, but >> > we're adding support for PCIe. >> >> How would it all work if I moved the PCIe module from one device to >> another? > > These boards are soldered down, at least in the case I care about. That is right. Since the out of band wake-up pin is not standard on the PCIe connector - this feature is for soldered chips only. > > Brian -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
