在 2016/9/24 9:45, Jiancheng Xue 写道:
> 在 2016/9/24 1:47, Rob Herring 写道:
>> On Sun, Sep 18, 2016 at 03:30:21PM +0800, Jiancheng Xue wrote:
>>> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
>>> Generator) module generates clock and reset signals used
>>> by other module blocks on SoC.
>>>
>>> Signed-off-by: Jiancheng Xue <xuejiancheng@xxxxxxxxxxxxx>
>>> ---
>>> change log
>>> v2:
>>> - Fixed compiling error when compiled as a module.
>>> - Fixed issues pointed by Stephen Boyd.
>>> - Added prefix HISTB for clock index macro definitions.
>>>
>>> .../clock/{hi3519-crg.txt => hisi-crg.txt} | 11 +-
>>> drivers/clk/hisilicon/Kconfig | 8 +
>>> drivers/clk/hisilicon/Makefile | 1 +
>>> drivers/clk/hisilicon/crg-hi3798cv200.c | 305 +++++++++++++++++++++
>>> drivers/clk/hisilicon/crg.h | 34 +++
>>> include/dt-bindings/clock/histb-clock.h | 64 +++++
>>> 6 files changed, 419 insertions(+), 4 deletions(-)
>>> rename Documentation/devicetree/bindings/clock/{hi3519-crg.txt => hisi-crg.txt} (82%)
>>> create mode 100644 drivers/clk/hisilicon/crg-hi3798cv200.c
>>> create mode 100644 drivers/clk/hisilicon/crg.h
>>> create mode 100644 include/dt-bindings/clock/histb-clock.h
>>>
>>> diff --git a/Documentation/devicetree/bindings/clock/hi3519-crg.txt b/Documentation/devicetree/bindings/clock/hisi-crg.txt
>>> similarity index 82%
>>> rename from Documentation/devicetree/bindings/clock/hi3519-crg.txt
>>> rename to Documentation/devicetree/bindings/clock/hisi-crg.txt
>>> index acd1f23..e3919b6 100644
>>> --- a/Documentation/devicetree/bindings/clock/hi3519-crg.txt
>>> +++ b/Documentation/devicetree/bindings/clock/hisi-crg.txt
>>> @@ -1,7 +1,7 @@
>>> -* Hisilicon Hi3519 Clock and Reset Generator(CRG)
>>> +* HiSilicon Clock and Reset Generator(CRG)
>>>
>>> -The Hi3519 CRG module provides clock and reset signals to various
>>> -controllers within the SoC.
>>> +The CRG module provides clock and reset signals to various
>>> +modules within the SoC.
>>>
>>> This binding uses the following bindings:
>>> Documentation/devicetree/bindings/clock/clock-bindings.txt
>>> @@ -10,7 +10,10 @@ This binding uses the following bindings:
>>> Required Properties:
>>>
>>> - compatible: should be one of the following.
>>> - - "hisilicon,hi3519-crg" - controller compatible with Hi3519 SoC.
>>> + - "hisilicon,hi3516cv300-crg"
>>> + - "hisilicon,hi3519-crg"
>>> + - "hisilicon,hi3798cv200-crg"
>>> + - "hisilicon,hi3798cv200-sysctrl"
>>
>> Why crg and sysctrl?
>>
> Hi Rob，
>
> In Hi3798cv200 SoC, the system controller (sysctrl) is another clock
> provider which provides clocks for some modules such as timer0, uart0,
> ir, led etc. These modules won't be power down when the system enters
> into the stand-by mode. Besides providing above clocks, sysctrl also
> contains registers used to control the whole system and some peripherals.
>
Hi Rob，
Do you still have any questions about this? Could you help me to ack this binding?
Thank you!
Regards,
Jiancheng
>
>>>
>>> - reg: physical base address of the controller and length of memory mapped
>>> region.
>>
>> .
>>
>
>
> .
>
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