On Thu, Sep 08, 2016 at 04:32:25PM +0800, Chen-Yu Tsai wrote: > On Thu, Sep 8, 2016 at 4:29 PM, Maxime Ripard > <maxime.ripard@xxxxxxxxxxxxxxxxxx> wrote: > > On Wed, Sep 07, 2016 at 03:24:11PM +0800, Chen-Yu Tsai wrote: > >> > + [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw, > >> > >> A23 manual and Allwinner sources say there is a bus gate for SPINLOCK. > >> Tested it myself, and it indeed exists. > > > > Yes, sorry. It was supposed to be spinlock instead of msgbox. > > > >> > + [RST_BUS_SPINLOCK] = { 0x2c4, BIT(22) }, > >> > >> Allwinner sources say there is a reset control for MSGBOX. > >> Tested it myself, and it indeed exists. > > > > However, the msgbox is mentionned nowhere in the datasheet. > > > > I'd prefer to be able to test that it actually works before adding it > > to the clock driver. > > I did in fact test it. With reset asserted, writes get ignored, > and reads produce all 0s. With the reset deasserted and clock > enabled, reads give the default value and writes stick. Afterwards > when I toggle the reset, the values revert to the default. Ok. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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