--- drivers/pci/host/pcie-rockchip.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 17612e5..33bf2e1 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -282,6 +282,11 @@ static int rockchip_pcie_wr_own_conf(struct rockchip_pcie *rockchip, mask = ~(((1 << (size * 8)) - 1) << ((where & 0x3) * 8)); + /* + * N.B. This read/modify/write isn't safe in general because it can + * corrupt RW1C bits in adjacent registers. But the hardware + * doesn't support smaller writes. + */ tmp = readl(rockchip->apb_base + PCIE_RC_CONFIG_BASE + offset) & mask; tmp |= val << ((where & 0x3) * 8); writel(tmp, rockchip->apb_base + PCIE_RC_CONFIG_BASE + offset); -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
