On Thu, Aug 25, 2016 at 02:21:58PM +0800, Chen-Yu Tsai wrote: > On sunxi we support cpufreq by changing the clock rate of PLL-CPU. > It's possible the clock output of the PLL goes out of the CPU's > operational limits when the PLL's multipliers / dividers are changed > and it hasn't stabilized yet. This would result in the CPU hanging. > > To circumvent this, we temporarily switch the CPU mux clock to another > stable clock before the rate change, and switch it back after the PLL > stabilizes. This is done with clk notifiers registered on the PLL. > > This patch adds common functions for notifiers to reparent mux clocks. > > Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx> Applied, thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
Attachment:
signature.asc
Description: PGP signature
