On 07/04, Jongsung Kim wrote: > On 2016년 07월 02일 09:20, Stephen Boyd wrote: > > Do you actually have an IC on the board that is doing some fixed > > factor calculation? Or is this a clk driver design where we are > > listing out each piece of an SoC's clk controller in DT? > > > The SoC has several PLLs of identical design, and one of them is divided > to half and used for CPUs. The fixed-factor-clock represents the divider. > Ok, so it sounds like we can have the driver that registers the CPU PLL also register the fixed factor clk? I fail to see why we need this from DT in that case. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
