On 06/21, Abhishek Sahu wrote:
> The current driver code gives the crash or gets hang while switching
> the CPU frequency some time. The APSS CPU Clock divider is not glitch
> free so it the APPS clock need to be switched for stable clock during
> the change.
>
> This patch adds the frequency change notifier for APSS CPU clock. It
> changes the parent of this clock to stable PLL FEPLL500 when it gets
> for PRE_RATE_CHANGE event. This event will be generated before actual
> clock set operations. The clock set operation will again change its
> corresponding parent by getting the same from frequency table.
>
> Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx>
> ---
> drivers/clk/qcom/gcc-ipq4019.c | 27 ++++++++++++++++++++++++++-
> 1 file changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c
> index df159c2..3c014f7 100644
> --- a/drivers/clk/qcom/gcc-ipq4019.c
> +++ b/drivers/clk/qcom/gcc-ipq4019.c
> @@ -1740,9 +1740,34 @@ static const struct of_device_id gcc_ipq4019_match_table[] = {
> };
> MODULE_DEVICE_TABLE(of, gcc_ipq4019_match_table);
>
> +int cpu_clk_notifier_fn(struct notifier_block *nb,
static?
Please come up with a better name that is not so generic.
> + unsigned long action, void *data)
> +{
> + int err = 0;
> +
> + if (action == PRE_RATE_CHANGE) {
> + err = clk_rcg2_ops.set_parent(&apps_clk_src.clkr.hw,
> + P_FEPLL500);
> + }
> +
> + return notifier_from_errno(err);
> +}
> +
> +struct notifier_block cpu_clk_notifier = {
static?
> + .notifier_call = cpu_clk_notifier_fn,
> +};
> +
> static int gcc_ipq4019_probe(struct platform_device *pdev)
> {
> - return qcom_cc_probe(pdev, &gcc_ipq4019_desc);
> + int err;
> +
> + err = qcom_cc_probe(pdev, &gcc_ipq4019_desc);
> +
> + if (!err)
> + clk_notifier_register(apps_clk_src.clkr.hw.clk,
> + &cpu_clk_notifier);
This has to be unregistered on driver remove.
> +
> + return err;
> }
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