On Wed, Jul 20, 2016 at 1:58 AM, Andrew Jeffery <andrew@xxxxxxxx> wrote:
> From: Joel Stanley <joel@xxxxxxxxx>
>
> The Aspeed SoCs contain GPIOs grouped by letter, where each letter group
> contains 8 pins. The GPIO letter groups are then banked in sets of four
> in the register layout.
>
> The implementation exposes multiple banks through the one driver, and
> requests and releases pins via the pinctrl subsystem. The hardware
> supports generation of interrupts with per-pin triggers, and exposes this
> capability through an irqchip and devicetree.
>
> A number of supported features are not yet implemented: Configuration of
> interrupt direction (ARM or LPC), debouncing, and provides WDT reset
> tolerance for output ports.
>
> Signed-off-by: Joel Stanley <joel@xxxxxxxxx>
> Signed-off-by: Alistair Popple <alistair@xxxxxxxxxxxx>
> Signed-off-by: Jeremy Kerr <jk@xxxxxxxxxx>
> Signed-off-by: Andrew Jeffery <andrew@xxxxxxxx>
> ---
> arch/arm/mach-aspeed/Kconfig | 4 +
> drivers/gpio/Kconfig | 8 +-
> drivers/gpio/Makefile | 1 +
> drivers/gpio/gpio-aspeed.c | 456 +++++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 468 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpio/gpio-aspeed.c
>
> diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
> index 25a0ae01429e..a52de9d3adfb 100644
> --- a/arch/arm/mach-aspeed/Kconfig
> +++ b/arch/arm/mach-aspeed/Kconfig
> @@ -6,6 +6,10 @@ menuconfig ARCH_ASPEED
> select ASPEED_WATCHDOG
> select MOXART_TIMER
> select PINCTRL
> + select GPIOLIB
> + select GPIO_ASPEED
> + select GPIO_SYSFS
> +
> help
> Say Y here if you want to run your kernel on an ASpeed BMC SoC.
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index 536112fd2466..2c21b5db09cd 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -137,6 +137,13 @@ config GPIO_ATH79
> Select this option to enable GPIO driver for
> Atheros AR71XX/AR724X/AR913X SoC devices.
>
> +config GPIO_ASPEED
> + bool "Aspeed GPIO support"
Since this is a bool Kconfig...
> + depends on (ARCH_ASPEED || COMPILE_TEST) && OF
> + select GENERIC_IRQ_CHIP
> + help
> + Say Y here to support Aspeed AST2400 and AST2500 GPIO controllers.
> +
[...]
> diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
> new file mode 100644
> index 000000000000..7885adc1332a
> --- /dev/null
> +++ b/drivers/gpio/gpio-aspeed.c
> @@ -0,0 +1,456 @@
> +/*
> + * Copyright 2015 IBM Corp
> + *
> + * Joel Stanley <joel@xxxxxxxxx>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */
> +
> +#include <linux/module.h>
...can you please get rid of module.h and all the MODULE_<xyz>
stuff and use the built in registration? Alternatively change it to
a tristate if there is a valid use case for it to be modular.
Thanks.
Paul.
--
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/spinlock.h>
> +#include <linux/platform_device.h>
> +#include <linux/gpio/driver.h>
> +#include <linux/pinctrl/consumer.h>
> +
> +struct aspeed_gpio {
> + struct gpio_chip chip;
> + spinlock_t lock;
> + void __iomem *base;
> + int irq;
> + struct irq_chip irq_chip;
> + struct irq_domain *irq_domain;
> +};
> +
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