Wan ZongShun, On Fri, Jul 15, 2016 at 12:02:55PM +0200, Arnd Bergmann wrote: > On Friday, July 15, 2016 5:44:50 PM CEST Wan ZongShun wrote: > > 2016-07-15 15:00 GMT+08:00 Arnd Bergmann <arnd@xxxxxxxx>: > > > On Friday, July 15, 2016 1:15:58 PM CEST Wan Zongshun wrote: ... > > > That assumes that REG_AIC_IPER contains a 32-bit value with one single > > > bit set to indicate which IRQ was triggered. > > > > > > If the difference is only in performance, you could try measuring which > > > of the two ends up being faster. > > > > It seems hard to measure. I think Do IO operation should be slower > > than shift 2. > > It depends on how fast that particular I/O path is. A lot of readl() > operations are awfully slow, but the hardware design for the interrupt > controller may in fact have optimized this to be reasonably fast. > > Another option would be to avoid the shift and just use the raw value > of the REG_AIC_IPER register as the hwirq, with a custom map() > callback that turns shifts the number read from the DT two bits > so it matches the register value. Good idea. Are the two lsb bits constant or do they need to be masked? thx, Jason. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
