On Wed, Jul 13, 2016 at 6:10 AM, Rob Herring <robh@xxxxxxxxxx> wrote:
> On Thu, Jul 07, 2016 at 04:02:58PM -0700, Iyappan Subramanian wrote:
>> Signed-off-by: Iyappan Subramanian <isubramanian@xxxxxxx>
>> Tested-by: Fushen Chen <fchen@xxxxxxx>
>> Tested-by: Toan Le <toanle@xxxxxxx>
>> Tested-by: Matthias Brugger <mbrugger@xxxxxxxx>
>> ---
>> .../devicetree/bindings/net/apm-xgene-mdio.txt | 37 ++++++++++++++++++++++
>> 1 file changed, 37 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/net/apm-xgene-mdio.txt
>>
>> diff --git a/Documentation/devicetree/bindings/net/apm-xgene-mdio.txt b/Documentation/devicetree/bindings/net/apm-xgene-mdio.txt
>> new file mode 100644
>> index 0000000..0247e70
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/apm-xgene-mdio.txt
>> @@ -0,0 +1,37 @@
>> +APM X-Gene SoC MDIO node
>> +
>> +MDIO node is defined to describe on-chip MDIO controller.
>> +
>> +Required properties:
>> + - compatible: Must be "apm,xgene-mdio-rgmii"
>> + - #address-cells: Must be <1>.
>> + - #size-cells: Must be <0>.
>> + - reg: Address and length of the register set
>> + - clocks: Reference to the clock entry
>> +
>> +For the phys on the mdio bus, there must be a node with the following fields:
>> + - compatible: PHY identifier. Please refer ./phy.txt for the format.
>> + - reg: The ID number for the phy.
>> +
>> +Example:
>> +
>> + mdio: mdio@0x17020000 {
>
> Drop the '0x'
Thanks for the review. Corrected and posted v6.
>
> With that,
>
> Acked-by: Rob Herring <robh@xxxxxxxxxx>
>
>> + compatible = "apm,xgene-mdio-rgmii";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x0 0x17020000 0x0 0xd100>;
>> + clocks = <&menetclk 0>;
>> + };
>> +
>> + /* Board-specific peripheral configurations */
>> + &mdio {
>> + menetphy: phy@3 {
>> + reg = <0x3>;
>> + };
>> + sgenet0phy: phy@4 {
>> + reg = <0x4>;
>> + };
>> + sgenet1phy: phy@5 {
>> + reg = <0x5>;
>> + };
>> + };
>> --
>> 1.9.1
>>
>> --
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