On Tuesday 26 November 2013 11:14 PM, ivan.khoronzhuk wrote: >>> +static int davinci_aemif_probe(struct platform_device *pdev) >>> +{ >>> + int ret = -ENODEV, i; >>> + struct resource *res; >>> + struct device *dev = &pdev->dev; >>> + struct device_node *np = dev->of_node; >>> + >>> + if (np == NULL) >>> + return 0; >>> + >>> + if (aemif) { >>> + dev_err(dev, "davinci_aemif driver is in use currently\n"); >>> + return -EBUSY; >>> + } >> >> Why expressly prevent multiple AEMIF devices? Its entirely conceivable >> to have two memories like NAND and NOR flash connect to two different >> AEMIF interfaces. >> > > It can be, but I'm not sure if it is needed. Currently I've not seen case where > more than 2 cses were used, I mean we have 2 cs free, why do we need the second AEMIF > controller? One usual reason is pinmux constraints. Its probably not a concern on the device you are working with right now but as devices get smaller, functionality on pins is multiplexed to handle multiple different use cases. Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html