On 07/04/16 08:22, Mark Brown wrote: > On Sat, Jul 02, 2016 at 04:55:49PM -0700, frowand.list@xxxxxxxxx wrote: > >> This is an extremely simple example to illustrate the concepts. It is not >> meant to represent the complexity of a real board. >> >> To start with, assume that the device that will eventually be on a daughter >> board is first soldered onto the mother board. The mother board contains >> two devices connected via bus spi_1. One device is described in the .dts >> file, the other is described in an included .dtsi file. >> Then the device tree files will look like: > > Can I suggest not using SPI as an example here? It's particularly > messy since addresses are essentially just a random signal that can be > totally separate to the controller hardware which might be adding more > complexity early on in building up your model than is really desirable. > It will need to be dealt with but perhaps not right now. I2C might be > easier. > > The initial issue with SPI is that you really need to do something like > bring out individual slots on the bus rather than the bus as a whole > since you're going to need a remapping layer to map chip selects on the > module to chip selects on the host board. > Yes, thank you for pointing that out. For the purposes of the mental model, when thinking about what I wrote, just change SPI to I2C everywhere. -Frank -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
