On Thu, 30 Jun 2016 23:16:35 +0200 Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx> wrote: > > > I'm sorry, but the whole point of the initial serie was to rework and > > > simplify things, precisely because dealing with the clk_factors code > > > was just too difficult nowadays. And this doesn't solve anything on > > > that aspect. > > > > In my code, all the clock factors I know about are handled. > > Basically, the requested and the parent rates give a multiplier and a > > divider. These ones are dispatched into the specific clock factors > > according to their constraints. > > You missed the "simplify" part. The other reason for this serie to > exist was to be consistent with what the other architectures are > doing, which is not the case here either. The other architectures have not a so complex mechanism as Allwinner's. The 'divider'/'fractional-divider'/multiplier'/... "standard" functions cannot be used in ou case. Your 'sunxi-ng' just add new structures to replace them, and, in fact, you are building an other restricted composite clock system. which will be unusable when new SoCs will appear. Yes, I should not have include the reset/bus gate/factor computation stuff in my patch series. Because the only important part is to have a flat definition of all the parameters giving this more simplification: one structure and one source file. -- Ken ar c'hentañ | ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/ -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
