On 06/01, Geert Uytterhoeven wrote: > Hi all, > > Currently the R-Car Clock Pulse Generator (CPG) drivers obtains the > state of the mode pins either by a call from the board code, or directly > by using a hardcoded register access. This is a bit messy, and creates a > dependency between driver and platform code. > > This RFC patch series converts the various Renesas R-Car clock drivers > and support code from reading the mode pin states using a hardcoded > register access to using a new R-Car RST driver. Dumb question, can we use the nvmem reading APIs instead of an SoC specific function to read the modes? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
