On 20/06/16 20:56, Douglas Anderson wrote: > In commit 802ac39a5566 ("mmc: sdhci-of-arasan: fix set_clock when a phy > is supported") we added code to power the PHY off and on whenever the > clock was changed but we avoided doing the power cycle code when the > clock was low speed. Let's now do it always. > > Although there may be other reasons for power cycling the PHY when the > clock changes, one of the main reasons is that we need to give the DLL a > chance to re-lock with the new clock. > > One of the things that the DLL is for is tuning the Receive Clock in > HS200 mode and STRB in HS400 mode. Thus it is clear that we should make > sure we power cycle the PHY (and wait for the DLL to lock) when we know > we'll be in one of these two speed modes. That's what the original code > did, though it used the clock rate rather than the speed mode. However, > even in speed modes other than HS200,/HS400 the DLL is used for > something since it can be clearly observed that the PHY doesn't function > properly if you leave the DLL off. > > Although it appears less important to power cycle the PHY and wait for > the DLL to lock when not in HS200/HS400 modes (no bugs were reported), > it still seems wise to let the locking always happen nevertheless. > > Note: as part of this, we make sure that we never try to turn the PHY on > when the clock is off (when the clock rate is 0). The PHY cannot work > when the clock is off since its DLL can't lock. > > This change requires ("phy: rockchip-emmc: Increase lock time > allowance") and will cause problems if picked without that change. > > Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx> > Reviewed-by: Shawn Lin <shawn.lin@xxxxxxxxxxxxxx> > Tested-by: Heiko Stuebner <heiko@xxxxxxxxx> Acked-by: Adrian Hunter <adrian.hunter@xxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html