On Mon, Jun 13, 2016 at 05:46:49PM -0000, Michal Suchanek wrote: > When testing SPI without DMA I noticed that filling the FIFO on the > spi controller causes timeout. > > Always leave room for one byte in the FIFO. > > Signed-off-by: Michal Suchanek <hramrach@xxxxxxxxx> Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx> Thanks, Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
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