Hi Sergei,
On Mon, Jun 13, 2016 at 1:24 PM, Sergei Shtylyov
<sergei.shtylyov@xxxxxxxxxxxxxxxxxx> wrote:
> On 6/13/2016 10:12 AM, Geert Uytterhoeven wrote:
>>>>> The only problem I'm seeing (again) is the RCAN clock failing to
>>>>> register:
>>>>>
>>>>> rcar_gen2_cpg_clocks_init: failed to register cpg_clocks rcan clock
>>>>> (-12)
>>>>>
>>>>> I was going to look at it yesterday but (wrongly) thought it somehow
>>>>> cured itself... I'll look at it now.
>>>>
>>>>
>>>> The RCAN parent is the second clock in the CPG node's "clocks" property,
>>>> which you didn't provide.
>>>
>>>
>>> Actually, the things are more complex. The figure 7.1c suggests that
>>> the
>>> RCAN clock has different parent on R8A7792 than on the other SoCs --
>>> namely
>>> PLL1/VCO 1/4. That may be, since there's just no USB_EXTAL signal on this
>>> SoC (it doesn't seem to support any USB IPs). Which means the
>>> 'clk-rcar-gen2' driver can't work with the RCAN clock in its current
>>> form.
>>
>> Right, I had forgotten about that.
>> Fortunately the clk-rcar-gen2 driver has a sane failure mode for this case
>> ;-)
>
> What do you mean?
I mean that it failed due to the missing parent clock, instead of continuing
silently with a wrong clock rate.
>> it seems the RCAN clock can just be modeled as a fixed clock. However,
>> its divider value isn't clear to me,
>
> IIRC, the fixed RCAN divisor was equal to 6.
1560 / 6 != 15.9.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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