Define the port mapping for the SmartRG SR400ACE device.
Signed-off-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
---
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 40 +++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
index 8b0c440b2e71..c219d33496cc 100644
--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
@@ -126,3 +126,43 @@
&spi_nor {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch0port0: port@0 {
+ reg = <0>;
+ label = "lan4";
+ };
+
+ switch0port1: port@1 {
+ reg = <1>;
+ label = "lan3";
+ };
+
+ switch0port2: port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ switch0port3: port@3 {
+ reg = <3>;
+ label = "lan1";
+ };
+
+ switch0port4: port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ switch0port5: port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ };
+ };
+};
--
2.7.4
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