On Monday, May 30, 2016 5:46:21 AM CEST Nava kishore Manne wrote: > > > The Axi-usb 5.00 IP is a FPGA based one. This IP needs to support two H/w designs one with 32 bit DMA addressing another one is 64 bit DMA addressing. > And also in the software point for view we don’t have any register to figure out whether it is supporting 32 bit DMA addressing or 64 bit DMA addressing. > To support both the designs I kept addrwidth property in the dt. I think here addrwidth property is make sense to differentiate the h/w configurations. > If you want me to changes it to boolean please let me know I will fix it in the next version. I think boolean would be more logical here, since what is configurable here is not how many bits are supported, but whether the XUSB_DMA_DSAR_ADDR register is present or not. Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
