The J-Core project (j-core.org) produces open source cpu and SoC peripheral cores synthesizable as FPGA bitstreams or ASICs. Signed-off-by: Rich Felker <dalias@xxxxxxxx> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 86740d4..9c070b8 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -126,6 +126,7 @@ invensense InvenSense Inc. isee ISEE 2007 S.L. isil Intersil issi Integrated Silicon Solutions Inc. +jcore J-Core.org jedec JEDEC Solid State Technology Association karo Ka-Ro electronics GmbH keymile Keymile GmbH -- 2.8.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
