On Fri, May 20, 2016 at 10:17:34AM +0200, Geert Uytterhoeven wrote:
> On Fri, May 20, 2016 at 4:53 AM, Rich Felker <dalias@xxxxxxxx> wrote:
> > --- /dev/null
> > +++ b/arch/sh/boot/dts/j2_mimas_v2.dts
> > @@ -0,0 +1,87 @@
> > +/dts-v1/;
> > +
> > +/ {
> > + compatible = "jcore,j2-soc";
> > + model = "J2 FPGA SoC on Mimas v2 board";
> > +
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + interrupt-parent = <&aic>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu@0 {
> > + device_type = "cpu";
> > + compatible = "jcore,j2";
> > + reg = < 0 >;
> > + clock-frequency = < 50000000 >;
> > + };
> > + };
> > +
> > + memory@10000000 {
> > + device_type = "memory";
> > + reg = < 0x10000000 0x4000000 >;
> > + };
> > +
> > + chosen {
> > + stdout-path = "/soc@abcd0000/serial@100";
> > + };
> > +
> > + soc@abcd0000 {
> > + compatible = "simple-bus";
> > + ranges = <0 0xabcd0000 0x100000>;
> > +
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + aic: interrupt-controller {
>
> aic: interrupt-controller@200 {
>
> > + compatible = "jcore,aic1";
> > + reg = < 0x200 0x10 >;
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + };
> > +
> > + cache-controller {
>
> @c0
>
> > + compatible = "jcore,cache";
> > + reg = < 0xc0 4 >;
> > + };
> > +
> > + timer {
>
> @200
>
> > + compatible = "jcore,pit";
> > + reg = < 0x200 0x30 >;
> > + interrupts = < 0x48 >;
> > + };
> > +
> > + spi {
>
> @40
>
> > + compatible = "jcore,spi2";
> > +
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + spi-max-frequency = <12500000>;
> > +
> > + reg = < 0x40 0x8 >;
> > +
> > + sdcard@1 {
>
> @0, to match reg below?
Yes; thanks for catching that. The chipselect logic was wrong a long
time ago and the wrong setting to compensate for that was fixed in the
actual reg cell but not in the name when the driver was fixed. I'm
applying all these changes.
Rich
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