Hi Rob, >> The MSM IOMMU is an implementation compatible with the ARM VMSA short >> descriptor page tables. It provides address translation for bus masters outside >> of the CPU, each connected to the IOMMU through a port called micro-TLB. >> Adding the DT bindings for the same. >> >> Signed-off-by: Sricharan R <sricharan@xxxxxxxxxxxxxx> >> --- >> .../devicetree/bindings/iommu/msm,iommu-v0.txt | 64 ++++++++++++++++++++++ >> 1 file changed, 64 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt >> >> diff --git a/Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt >b/Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt >> new file mode 100644 >> index 0000000..b22c607 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt >> @@ -0,0 +1,64 @@ >> +* QCOM IOMMU >> + >> +The MSM IOMMU is an implementation compatible with the ARM VMSA short >> +descriptor page tables. It provides address translation for bus masters outside >> +of the CPU, each connected to the IOMMU through a port called micro-TLB. >> + >> +Required Properties: >> + >> + - compatible: Must contain "qcom,iommu-v0-apq8064". > >qcom,apq8064-iommu would be the preferred order and I think you can drop >the v0. Ok, will change this. Regards, Sricharan -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
