On Fri, 2016-05-13 at 02:24 +0200, Marek Vasut wrote: > On 05/13/2016 02:00 AM, Trent Piepho wrote: > > On Mon, 2016-01-11 at 05:34 +0100, Marek Vasut wrote: > >> From: Graham Moore <grmoore-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@xxxxxxxxxxxxxxxx> > >> > >> Add support for the Cadence QSPI controller. This controller is > >> present in the Altera SoCFPGA SoCs and this driver has been tested > >> on the Cyclone V SoC. > > > > I'm trying to use this driver the Alaric Devkit for Altera's Arria10 > > SoC. It's not working so far. In the course of trying to debug it, > > I've found a few things with the driver in the socfpga-4.1-ltsi branch. > > So are you trying to debug this driver or some other out-of-tree driver? > btw. I pushed the latest version here: > > https://git.kernel.org/cgit/linux/kernel/git/marex/linux-2.6.git/log/?h=next/cadence-qspi I'm trying to use the out of tree driver from Altera's latest kernel, from here: https://github.com/altera-opensource/linux-socfpga/tree/socfpga-4.4 But it's not a totally different driver, it's just an older version of this driver. I'm thinking of porting in this version since I think it's much improved (after V11 one would hope so). Really, Altera should update their supported kernel with this code. Comments about what's on your branch. Commit "ARM: socfpga: Add Candence QSPI controller DT node" only adds the node for Cyclone 5. This same DT node should also be added to the socfpga_arria10.dtsi file. ��.n��������+%������w��{.n����z�{��ܨ}���Ơz�j:+v�����w����ޙ��&�)ߡ�a����z�ޗ���ݢj��w�f
