For consistency between Exynos5410 and Exynos542x/5800 switch to similar
way of defining fin_pll/oscclk. Add a node early, before implementing
this in driver to preserve bisectability.
Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
Reviewed-by: Javier Martinez Canillas <javier@xxxxxxxxxxxxxxx>
---
arch/arm/boot/dts/exynos5410-smdk5410.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts b/arch/arm/boot/dts/exynos5410-smdk5410.dts
index 0f6429e1b75c..d7d658deeff4 100644
--- a/arch/arm/boot/dts/exynos5410-smdk5410.dts
+++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts
@@ -31,6 +31,13 @@
#clock-cells = <0>;
};
+ fixed-rate-clocks {
+ oscclk {
+ compatible = "samsung,exynos5420-oscclk";
+ clock-frequency = <24000000>;
+ };
+ };
+
firmware@02037000 {
compatible = "samsung,secure-firmware";
reg = <0x02037000 0x1000>;
--
2.5.0
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