Hi Boris, 2016-05-10 10:55 GMT+02:00 Boris Brezillon <boris.brezillon@xxxxxxxxxxxxxxxxxx>: > > Romain, I thought you had a real use case on sama5d4 where this patch > was needed to make the whole thing work. Not sure why you submitted > this patch if you couldn't test it on a real board. My target CPU is SAMA5D2, but I chose the SAMA5D4 for the compatible string as it was the earliest design whose datasheet mentioned the RB_EDGE3 bit. I wrote the SAMA5D2 support in advance, as I was waiting for my board to be ready, basing myself on what was found in the datasheet. The changes included both the variable RB_EDGE support, and the PMECC register layout changes, which were a prerequisite to use the SAMA5D2 NAND controller. I tested the code against regressions on sama5d3xek, and Wenyou reported that he tested it on Atmel's SAMA5D2 PTC, which was the only existing board at that time with both a SAMA5D2 SoC and a NAND chip. Unfortunately, as the bug is only seen when writing on the flash, and it only affects the speed of the device, he did not notice it. I sent the patches early because I expected the submission process to be long, and I wanted to be able to freeze the kernel version to be used on my board as soon as possible. Best regards, -- Romain Izard -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
